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Support for tt.dot_scaled operator
#2804
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Signed-off-by: Tiotto, Ettore <[email protected]>
Signed-off-by: Tiotto, Ettore <[email protected]>
Signed-off-by: Tiotto, Ettore <[email protected]>
Signed-off-by: Tiotto, Ettore <[email protected]>
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@etiotto in order to test these changes we need to unskip intel-xpu-backend-for-triton/python/test/unit/language/test_core.py Lines 3437 to 3438 in d804502
Did you plan to do this here? |
Yes we need to do that, however the code is not yet fully functional because the lowering code for the |
Signed-off-by: Tiotto, Ettore <[email protected]>
Signed-off-by: Tiotto, Ettore <[email protected]>
Signed-off-by: Tiotto, Ettore <[email protected]>
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PR approach LGTM. Just some NITs. |
@victor-eds Maybe you forgot to submit the NITs? |
leonling-ll
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LGTM.
| newShape[kIdx] *= 2; | ||
| retTy = RankedTensorType::get(newShape, FloatType::getBF16(ctx), | ||
| newVEncoding); | ||
| Type elemType = FloatType::getBF16(ctx); |
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Can we define this inside the if statement below?
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I rather have it here because elemType is used after the if/else at line 147
| namespace mlir { | ||
| class ModuleOp; | ||
| } |
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I'd bet we don't need this
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ModuleOp is used in "intel/include/Dialect/TritonIntelGPU/IR/TritonIntelGPUAttrDefs.h.inc" now:
static DPASCapability getDPASCapability(mlir::ModuleOp mod);
That is the reason I have put the forward declaration here.
third_party/intel/include/Dialect/TritonIntelGPU/IR/TritonIntelGPUAttrDefs.td
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Signed-off-by: Tiotto, Ettore <[email protected]>
Signed-off-by: Tiotto, Ettore <[email protected]>
This PR decomposed a
tt.dot_scaledoperation into att.dotoperation where one of the operands (e.g A) is scaled using thetriton_gpu_upcast_mxfpoperation.Note: The
upcast_mxfpoperation is not lowered to LLVM IR in this PR.